1. Field of the Invention
The present invention relates to a MOS transistor with a controlled threshold voltage. Such a MOS transistor may form a VLSI (very large scale integrated circuit), for example.
2. Description of the Related Art
A present VLSI has a large power consumption. Recently, most VLSIs driven by one or more batteries are used, such VLSIs is adapted to a portable terminal application, for example, and thus it is a pressing need to reduce the power consumption of the VLSI remarkably while a fast operation of the VLSI is maintained.
In a Metal-Oxide-Semiconductor (MOS) transistor which composes the VLSI, the most important parameter related to the fast operation and the power consumption of the MOS transistor is a threshold voltage of the MOS transistor. To realize the fast operation of the MOS transistor, it is necessary to lower the threshold voltage. However, a leakage current, when the MOS transistor is turned off, increases if the threshold voltage is low. As a result, the power consumption of the MOS transistor increases.
Normally, the threshold voltage is approximately constant while the transistor is turned on and off, however, it is possible to control the threshold voltage by changing a substrate voltage of the MOS transistor. That is, the threshold voltage shift ΔVth is expressed according to the following equation.ΔVth=−Vbs  (1)wherein γ is a body effect factor of the MOS transistor. Therefore, one way to compromise the fast operation and the reduction of the power consumption of the MOS transistor is that the threshold voltage is lowered when the MOS transistor is turned on and rises when the MOS transistor is turned off by changing the substrate voltage of the MOS transistor.
A VTMOS (Variable Threshold MOS) technique and a DTMOS (Dynamic Threshold MOS) technique are proposed in such a way.
In case of a VTMOS transistor composed by using the VTMOS technique, the threshold voltage of the VTMOS transistor is controlled by a whole of a chip in which the VTMOS transistor is provided. In this case, a first voltage is applied to a substrate of the VTMOS transistor in the active mode, and a second voltage smaller than the first voltage is applied to the substrate in the standby mode, thereby, the threshold voltage rises.
On the other hand, a DTMOS transistor such as a n type DTMOS transistor shown in FIG. 1 composed by using the DTMOS technique comprises a SOI 4 which includes a substrate 1 composed of a p type semiconducting material (e.g. silicon), a single crystal layer 2 composed of a semiconducting material (e.g. silicon) and an insulating layer 3 (e.g. silicon dioxide layer) interposed between the substrate 1 and the single crystal layer 2. The single crystal layer 2 is formed therein with a n type source region 5, a n type drain region 6 and a p type body 7 surrounded by the source region 5 and the drain region 6. Further, a gate electrode 9 deposited on the body 7 through a gate oxide 8 is electrically connected to the body 7 through a wire 10 so that the threshold voltage of the DTMOS transistor is controlled. In other words, the threshold voltage is always lowered when the DTMOS transistor is turned on, and it always rises when it is turned off.
Gate characteristics of the DTMOS transistor and a conventional MOS transistor are explained with reference to a graph in FIG. 2. In FIG. 2, each of gate voltages Vgs of these transistors is plotted on a horizontal line of the graph, and each of drain currents Ids of these transistors is plotted on a vertical line of the graph. A curve corresponding to Vbs=0 represents the characteristics of the conventional MOS transistor. As a substrate voltage Vbs of the DTMOS transistor is equal to the gate voltage Vgs when it is turned on, the threshold voltage is lowered by ΔVth. If leakage currents of the conventional MOS transistor the DTMOS transistor are same, a gate driving force of the DTMOS transistor improves by ΔVth. Also, Vdd represents a voltage supply voltage in FIG. 2.
In such a way, it is possible to reduce the power consumption of the MOS transistor while a fast operation of the MOS transistor is maintained by using the VTMOS technique or the DTMOS transistor.
With reference to the equation (1), in order to control the threshold voltage effectively, it is preferable to make the body effect factor γ high. However, in general, it is necessary to raise an impurity concentration of the MOS transistor in order to make the body effect factor of the MOS transistor high. As a result, the threshold voltage itself rises, and the fast operation of the MOS transistor is degraded. In such a circumstance, an optimization of the body effect factor γ has not been performed so far, and the body effect factor γ is normally about 0.1 to 0.3.
Here, each of the body effect factors γ of the conventional MOS transistor and a fully depleted SOI MOS transistor is explained with reference to FIGS. 3 and 4, respectively. In case of a conventional MOS transistor having a n type channel, a substrate 13 in which a source region 11 and a drain region 12 are formed in n type, and in case of a conventional MOS transistor having a p type channel, the substrate 13 is p type. The body effect factors γ of the conventional MOS transistor is expressed as the following equation.γ≈3tfox1/Id  (2)
Wherein tfox1 is a thickness of a gate oxide 15 interposed between the substrate 13 and a gate electrode 14, and 1d is a depth of a depletion layer formed directly below the gate oxide 15. Therefore, it is necessary to raise the impurity concentration and lower the depth 1d in order to make the body effect factors γ high. However, the threshold voltage becomes high if the impurity concentration becomes high, as described. This situation holds true in case of a partially depleted SOI MOS transistor.
On the other hand, the body effect factors γ of the fully depleted SOI MOS transistor as shown in FIG. 4 is expressed as the following equation.γ3tfox2/(3tbox+tSOI1)  (3)
Wherein tbox is a thickness of an insulating layer 18 of a SOI 16, tSOI1 is a thickness of a single crystal layer 17 of the SOI 16, and tfox2 is a thickness of a gate oxide 19. In this case, the depth of the depletion layer corresponds to tbox+tSOI1.
Recently, it is desirable to increase the body effect factor while the threshold voltage is lowered in order to utilize characteristics of the VTMOS technique and the DTMOS technique more than usual as well as compromise the fast operation of the MOS transistor and reduction of the power consumption of the MOS transistor. However, it is difficult to compromise these requirements because of the disadvantage as already stated.